SC20W - Display ESCCLK

Hi guys,

I’m trying to integrate a new MIPI-Display to Quetcel SC20W module.
Following the “SC20_Display_Driver_Development_Guide” I’ve calculated the related DSI timing by mean of 80-“NH713-1_G_DSI_Timing_Parameters” excel attached to developement guide.

In the excel is reported this parameter " Escclk source (mxo = 27MHz, pxo = 24MHz, cxo = 19.2MHz) " that is listed as a configurable one but I was not able to find any info related to it.

Does anyone know how the meaning of ESCCLK parameter and how to properly configure it?

I’m pretty sure that the other display parameters that I’ve input are correct (front porch, back porch, etc).
The Quetcel SC20W is equipped with MSM8909 chipset while display controller is fitipower ED790007AD2.

Thanks in advance for your support

hi, bucky,
pls only change the paras in the red area for porting.

and the Escclk source is the internal clk line, and these clks will result in the final internal clk about the display. you could search some info about the struct of framebuffer in linux on google.