Hello,
I have issue with LC86GLAMD module ignoring $PAIR050 command for changing position fix interval output to 500ms. They accept other commands.
Out of 300 modules we have 10pcs seems to be ignoring this command and staying in 1s update mode, they all report same string $PQTMVER,1,MODULE,LC86GLANR12A02S,2023/12/26,09:53:00*11 when checking for firmware revision.
Modules seem to come from two different production batches (Q1-C0836 and Q1-C5878).
Is this a known issue? What can I do to change the interval rate on such module?
Hi Pjacalski,
Did you receive PAIR001 ACK reply from LC86G? I tried on the same firmware, and it works immediately after command is successfully sent to module.
If you want to keep this setting after reboot, you need to save configuration by sending $PAIR513*3D
Q1-C0836 and Q1-C5878 have different TCXO provider. Both of the TCXOs have no impact on the performance, hardware design, firmware and protocol.
Best regards
Hello Raphael,
No, on the affected modules we do not get PAIR001 ACK to PAIR050 command. There is either completely no response to PAIR050, or sometimes the module restarts.
After PAIR050 we send PAIR080, and to that all module respond so it’s not general communication issue with those 10 modules.
Best Regards,
Hello Raphael,
I did some more checks on one of the problematic boards by connecting external usb/uart converter. In QGNSS I see such output when I send PAIR050 command:
[16:46:24.460 Uart Tx:0017 B] $PAIR050,500*26
[16:46:24.475 Uart Rx:0019 B] $PAIR001,050,1*3F
[16:46:26.190 Uart Rx:0001 B]
[16:46:26.193 Uart Rx:0015 B]
F1: 0000 0000
[16:46:26.196 Uart Rx:0022 B]
V0: 0000 0000 [0001]
[16:46:26.196 Uart Rx:0015 B]
00: 0000 0000
[16:46:26.208 Uart Rx:0022 B]
U0: 0000 0001 [0000]
[16:46:26.208 Uart Rx:0015 B]
D0: 0000 0001
[16:46:26.209 Uart Rx:0015 B]
T0: 0000 00A6
[16:46:26.209 Uart Rx:0018 B]
Leaving the BROM
[16:46:26.209 Uart Rx:0002 B]
[16:46:26.209 Uart Rx:0033 B]
[Bootloader] bl_uart_init done
[16:46:26.225 Uart Rx:0032 B] set CP10 and CP11 Full Access
[16:46:26.225 Uart Rx:0040 B] [CLK] Dynamic Clock Management: Enable
[16:46:26.225 Uart Rx:0023 B] [CLK] frequency meter
[16:46:26.225 Uart Rx:0029 B] CM4(CMSYS) freq [215948]KHz
[16:46:26.226 Uart Rx:0028 B] BUS(FSYS) freq [107974]KHz
[16:46:26.226 Uart Rx:0022 B] SFC freq [107974]KHz
[16:46:26.226 Uart Rx:0020 B] SPISLV freq [0]KHz
[16:46:26.241 Uart Rx:0022 B] I3C freq [107974]KHz
[16:46:26.242 Uart Rx:0027 B] RTC SRAM freq [107974]KHz
[16:46:26.242 Uart Rx:0016 B] hal_flash_init
[16:46:26.242 Uart Rx:0031 B] BL Jump to addr 0x8009000 (0)
[16:46:26.242 Uart Rx:0002 B]
[16:46:26.316 Uart Rx:0058 B] $PQTMVER,1,MODULE,LC86GLANR12A02S,2023/12/26,09:53:00*11
[16:46:26.564 Uart Rx:0017 B] $PAIR011,001*27
[16:46:26.566 Uart Rx:0018 B] $PAIR010,1,-1*16
[16:46:26.569 Uart Rx:0018 B] $PAIR010,2,-1*15
So the module is in fact replying with PAIR001 ACK, but then crashes and reboots, that’s why it seems like it just ignored the message.
I checked voltage rails on VCC, VBCK and RESET_N lines with a scope, and they are all stable during crash.
Best regards,
Hi Pjacalski,
It seems that you have some trouble with UART communication between host and LC86G. Can you try to connect TTLtoUSB convertor to pin1&2, and try to read and send commands to LC86G?
Please check like this and see if issue still exist without controled by host.
Best regards,
Did you find a solution? I am getting the same “BL Jump to addr 0x8009000” log messages instead of NMEA outputs for devices that have been working fine for the past 2-3 weeks.
On boot after sending my config PAIR commands I get:
[CPU1] [11598] [INFO] [GPS<-] F1: 0000 0000
[CPU1] [11599] [INFO] [GPS<-] V0: 0000 0000 [0001]
[CPU1] [11600] [INFO] [GPS<-] 00: 0000 0000
[CPU1] [11602] [INFO] [GPS<-] U0: 0000 0001 [0000]
[CPU1] [11613] [INFO] [GPS<-] D0: 0000 0001
[CPU1] [11614] [INFO] [GPS<-] T0: 0000 00A6
[CPU1] [11615] [INFO] [GPS<-] Leaving the BROM
[CPU1] [11628] [INFO] [GPS<-] [Bootloader] bl_uart_init done
[CPU1] [11630] [INFO] [GPS<-] set CP10 and CP11 Full Access
[CPU1] [11632] [INFO] [GPS<-] [CLK] Dynamic Clock Management: Enable
[CPU1] [11644] [INFO] [GPS<-] [CLK] frequency meter
[CPU1] [11645] [INFO] [GPS<-] CM4(CMSYS) freq [215922]KHz
[CPU1] [11647] [INFO] [GPS<-] BUS(FSYS) freq [107974]KHz
[CPU1] [11659] [INFO] [GPS<-] SFC freq [107948]KHz
[CPU1] [11660] [INFO] [GPS<-] SPISLV freq [0]KHz
[CPU1] [11661] [INFO] [GPS<-] I3C freq [107948]KHz
[CPU1] [11673] [INFO] [GPS<-] RTC SRAM freq [107948]KHz
[CPU1] [11674] [INFO] [GPS<-] hal_flash_init
[CPU1] [11675] [INFO] [GPS<-] BL Jump to addr 0x8009000 (0)
Hi @system123
Please check your previous post for the solution
best regards
