Hi there
I set the module to PCM output in the master mode and use At+QDAI=1,0,0,4,0 command but there is no signal in the logic analyzer when I make a call.
Hi @peter1990
The following are the precautions for the AT+QDAI command, the command restarts to take effect, you can check if there is a setting error.
The command restarts to take effect, and the set value will be saved in NV as the subsequent default value.
4096K clock frequency is only available for 16K sampling rate.
128K clock frequency is not supported.
8-bit a-law and 8-bit u-law data formats are not supported (only 16-bit linear encoding is supported).
Bit per frame=/. For example, = 2048K, = 8K, then Bit per frame = 256. Bit per frame must be greater than 16.
When the module selects the slave mode, the clock signal and synchronization signal must be provided by the master device.
The default sampling rate is 8K. If you need 16K sampling rate, you can set to 1 to achieve 16K sampling rate. For example, ALC5616 is set to 16K (AT+QDAI=3,0,0,5,0,1,1,1).
When <num_slots> is 1, <slots_mapping> can take values from 1 to 16; when <num_slots> is 2, the second <slots_mapping> can take values from 2 to 16.
Hi @peter1990
I’m in the exact same situation with EG915U module.
Where you able to find a solution to you problem?
Thanks,
Simon