Confirm rise time of EG916

IoT Modules LTE-A Module
1

Hello,

On a previous design with BG95-M3 we used LDO: TPS7A5201. On this component the noise rejection and the output rise time are controled by a single capacitor. We choosed 1uF and never had issue with a really slow rise time of about 200ms.

On EG916 a maximum rise time of 10ms is indicated in hardware design guide but I tested with same power design (this new board is almost copy/past with our previous design) and it’s also working well.

My question is: are those 10ms max really mandatory or if the power rise is guaranted monotonic their is no really problem having 200ms power supply (Vdd_bb and vdd_rf) rise time?

Thank you,

Regards,

Thomas

2

Hello,

Thank you for sharing your test results and the details of your power supply design.

For EG916Q, the EG91xQ Series Hardware Design V1.6 specifies a VBAT rise time of less than 10ms in Figure 15. It also requires VBAT to remain stable for at least 30ms before PWRKEY is pulled low. These are separate timing conditions.

Although your board operates successfully with a monotonic 200 ms ramp, this does not confirm reliable startup across all operating conditions and module variations. The guide does not provide an exception for slower monotonic ramps, so we recommend following the specified <10 ms timing.

Best regards.
Fazrul Redzuan