BG77 hardware design

I am working on a new HW design with a BG77 with limited physical space. I would like to eliminate the separate 3.3volt LDO for the USBPHY_3P3 supply in to the BG77 module. The hardware design guide and reference circuit show the LDO switched (enable pin) with USBPHY_3P3_EN and VDD_EXT (both BG77 outputs).

Is switched USBPHY_3P3 power necessary for proper BG77 function or can continuous 3.3volt power be applied to the USBPHY_3P3 supply pin of the BG77?

Thank you,
Greg
LooUQ

I have designed and tested BG600 board also with limited board area. I also ommited the sepparate LDO for 3v3 and left the 3P3_EN floating. It seems that it works fine and connects via USB. Also the current consumption when the module is powered down seems quite reasonable - 30-40uA if I recall correctly.

One big problem that I have is that the signals are qute succeptable to RF interference when level shifted from 1v8 to 3v3. The chips that don’t need any direction control for level shifting seem to just use quite weak pull-ups at the 3v3 end. My chip prohibits external pull-up resistors.

I think I saw somewhere in this forum a tip to just connect the 1v8 outputs straight to 3v3 inputs if they register “logic 1” at 1.65V, but 150mV margin seems quite inadequate to me.

the level convertors is big problem - I asked Quectel several times but they didn’t answer

Some pins is 3.3v tolerate … Quectel, please share this info from SoC documentation

Where is necessary, use R dividers
if you use level convertors - read documentation & check impedanse …
example TXB0108PW is bad for I2C and bi-directional pins

8.3.5 Pullup or Pulldown Resistors on I/O Lines
The TXB0108 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0108 have low
dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be
kept higher than 50 k? to ensure that they do not contend with the output drivers of the TXB0108. For the same
reason, the TXB0108 should not be used in applications such as I2C or 1-Wire where an open-drain driver is
connected on the bidirectional data I/O. For these applications, use a device from the TI TXS01xx series of level
translators.

this ( SPI ) work fine without level-convertors

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Thank you for sharing your experience hrm!

My take was that the power consumption would go up when no USB was attached, unnecessarily.

My guess is that the 10K resistor to VDD_EXT is a pullup for a open-collector USBPHY_3P3_EN output. If no VBUS is sensed, the BG77 turns off the external LDO. If that were the case, I was also considering replacing the dedicated USB PHY LDO chip with a MOSFET controlled by USBPHY_3P3_EN (slightly less cost with 1 less cap, slightly smaller device). The MOSFET would switch supply to USBPHY_3P3 from the main LDO.