BG600L-M3 design-in issues

  1. Kindly reveal an internal (equivalent) circuit of PWRKEY pin. Based on description in Hardware Design, I suppose there’re built-in diode (the reason of voltage drop from 1.8V to 1.5V) and pull-up of about 100-120KOhm (based on measurement of a current and ability to drive the input by button or open collector). Probably, it’ll be necessary to contact to Qualcomm.

  2. Please clarify max drive current of GPIO and GNSS_LNA_EN pins. This important spec is not mentioned in Hardware Design.

  3. Based on qapi_tlmm.h from SDK, pins configured as GPIO may choose a drive strength from the range of 2-16mA. Is it possible to choose drive strength for pins configured as SPI which may have 50MHz clock?

  4. If USB isn’t used, can USBPHY_3P3 and USB_VBUS be left floating or should be grounded?

  5. Is firmware upgrade over UART not possible? If not and no USB, then FOTA only?

  6. Please get a look onto Figure 2 (Pin Assignment) for basic and QuecOpen Hardware Design datasheets. Let’s review a couple of explicit differences: pins 22/23 in basic usage are assigned as GNSS_TXD/RXD, the same pins in QuecOpen usage – as GPIO5/6; pins 29/30 in basic usage - as DBG_TXD/RXD, the same pins in QuecOpen usage – as GPIO7/8.
    Now get a look onto the first note below the Table 5 (Multiplexing Pins): the pin functions 1/2/3/4 take effect only after software configuration. At the same time Table 5 declares all pins have a pull-down by default so it’s logical to assume that all pins are configured as GPIO inputs which is Function 1 but this goes in contrary to the note we just reviewed.
    Being have BG600L-M3 uses the only firmware, there’s a question: how does the module understand the way it used (basic or QuecOpen) and make a decision on configuring pins 22/23 as GNSS UART and pins 29/30 as DEBUG UART in basic usage but configuring pins 22/23/29/30 as GPIO in QuecOpen usage? I have the only hypothesis: if firmware sees a valid user application (mentioned in oem_app_path.ini) upon startup, then pins are configured as per QuecOpen Hardware Design, alternatively as per basic Hardware Design.

sorry for this delay !thank to select quectel product .

In fact , The purpose of answering questions on the forum is to let everyone search for common problems here
it is not recommended to merge so many issues in one topic, for the other user , which is not convenient to seach , thanks in advance for your understanding .

for your issues , pls see the below comments :slightly_smiling_face:

  1. for the hw reference design , pls refer to the below docs;

  1. for more hareware issue ,you can send the email to

    i can forward you issue to HW expert.

    for GPIO the max current is 16MA

  2. for SPI interface , it is not power PIn , we can not drive power device with it, It is used to transmit data, not to drive power devices

5 normally , if you devie has left from the factory , DFOTA is the best choice , not FOTA

  1. for PIN23/22 , there is different function defined in quecopen solution , for the detail
    pls refer the below BG95 quecopen HW design doc .it is Same .


for quecopen slution , the os will indentify the multi-fuction PIn by the inital code part , if you inital it as URAT , it will be use as UART .