uint8_t read_165(void)
{
uint8_t recv = 0;
uint8_t tx = last_lcd_byte;
ql_spi_cs_low(QL_CUR_SPI_PORT);
ql_delay_us(20); // tPLW
ql_spi_cs_high(QL_CUR_SPI_PORT);
ql_delay_us(5); // tPLH
ql_spi_write_read(QL_CUR_SPI_PORT, &recv, &tx, 1);
QL_AUTODIALER_LOG(“HC165 recv1: 0x%02X,0x%02X \r\n”, recv, tx);
return recv;
}
on MISO i am getting correct data but in recv my bits is not what i see on MISO, it always shows 0XFF. Can anybody help me on this? Chipset is EC600UCE_AB.
Dear @Rajesh_215 ,
Based on the symptom (RX always 0xFF while you can see activity on the MISO line), the module is sampling MISO as a constant HIGH during the actual SPI transfer. This typically happens when the external device is not driving MISO at the sampling instant (line floating/pulled up), or when the SPI MISO pin/mode is not aligned with the signal you are probing.
In your current sequence, you toggle ql_spi_cs_low() and then immediately set ql_spi_cs_high() before calling ql_spi_write_read(). That means the SPI transfer is executed while CS is inactive. If this CS line is used to enable the external device output (or if the EC600 SPI controller expects CS asserted during the transfer), the slave output will be tri-stated during ql_spi_write_read(), and the RX data will read back as 0xFF.
To resolve this, separate the 74HC165 latch function from SPI chip select. Use a dedicated GPIO to pulse the 74HC165 /PL (parallel load) signal low-to-high to latch the inputs, then perform ql_spi_write_read() while the shift register is enabled and actively driving MISO. If you must use a CS/enable signal in your design, keep it asserted for the entire SPI transfer (CS low → transfer → CS high). After fixing the control timing, verify the SPI configuration by starting with a low SPI clock (e.g., 100–500 kHz) and testing Mode 0/Mode 1, and confirm the pinmux for the selected QL_CUR_SPI_PORT matches the physical MISO pin you are measuring. Finally, ensure the IO voltage levels are compatible (EC600 IO levels vs. the 74HC165 supply), as an input-threshold mismatch can also cause invalid sampling.
Best Regards,
Aghelan
